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61 lines
1.3 KiB
Makefile
61 lines
1.3 KiB
Makefile
# make gets confused if a file with the same name exists in the sources, so some
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# file are prefixed with test_
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rawtests = \
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expansion \
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test_here_doc \
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test_wordlist_idx \
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test_redirection_parsing \
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test_quote_removal \
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test_cmdlist_use_after_free \
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test_metacharacters \
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test_parse_command_lists \
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test_parse_pipelines \
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test_parse_simple_cmds \
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test_env_manip \
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test_word_splitting \
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ifeq ($(CFLAGS),)
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CFLAGS = -Wall -Wextra -Werror -g
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endif
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tests = $(addprefix test_,$(rawtests))
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run_tests = $(addprefix run_test_,$(rawtests))
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test_objs = $(addsuffix .o,$(tests))
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objs := $(addprefix ../,$(objs)) \
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testutil.o \
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parse_command_list.o \
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parse_pipeline.o \
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all_objs = $(objs) $(test_objs)
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deps = $(all_objs:.o=.d)
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LDLIBS = \
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-lreadline \
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-lft
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LIBFTDIR = ../libft/
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LIBFT = $(LIBFTDIR)libft.a
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IFLAGS = -I$(LIBFTDIR)
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LINCLUDE = -L$(LIBFTDIR)
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.PHONY: run fclean run_test_%
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.NOTPARALLEL: run
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run: $(run_tests)
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@echo "Finished running C tests"
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-include $(deps)
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%.o: %.c
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$(CC) -c $(CFLAGS) $(IFLAGS) -o $*.o $*.c
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$(CC) -MM $(CFLAGS) $(IFLAGS) $*.c > $*.d
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test_%: %.o $(objs)
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$(CC) $(CFLAGS) -rdynamic -o $@ $*.o $(objs) $(LINCLUDE) $(LDLIBS)
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run_test_%: test_%
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@echo
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@echo "====== Now running test: $* ======"
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@echo
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./test_$*
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@echo "====== End of test: $* ======"
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fclean:
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rm -f $(tests)
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